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1 lt1769 1769fa constant-current/ constant-voltage 2a battery charger with input current limiting simple solution to charge nicd, nimh and lithiumrechargeable batteries?harging current programmed by resistors or dac adapter current limit allows maximum possiblecharging current during system use* precision 0.5% accuracy for voltage mode charging available in 20-lead exposed pad tssop and28-lead narrow ssop packages high efficiency current mode pwm with 3a internalswitch 5% charge current accuracy adjustable undervoltage lockout automatic shutdown when ac adapter is removed low reverse battery drain current: 3 m a current sensing can be at either terminal of the battery charging current soft start shutdown control the lt 1769 current mode pwm battery charger is a simple, efficient solution to fast charge modern recharge-able batteries including lithium-ion (li-ion), nickel-metal- hydride (nimh) and nickel-cadmium (nicd) that require constant-current and/or constant-voltage charging. the internal switch is capable of delivering 2a** dc current (3a peak current). charge current can be programmed by resistors or a dac to within 5%. with 0.5% reference voltageaccuracy, the lt1769 meets the critical constant-voltage charging requirement for li-ion cells. a third control loop is provided to regulate the current drawn from the input ac adapter. this allows simulta- neous operation of the equipment and battery charging without overloading the adapter. charge current is reducedto keep the adapter current below specified levels. the lt1769 can charge batteries ranging from 1v to 20v.ground sensing of current is not required and the battery? negative terminal can be tied directly to ground. a saturat- ing switch running at 200khz gives high charging effi- ciency and small inductor size. a blocking diode is not required between the chip and the battery because the chip goes into sleep mode and drains only 3 m a when the wall adapter is unplugged. figure 1. 2a lithium-ion battery charger chargers for nicd, nimh, lead-acid, lithiumrechargeable batteries switching regulators with precision current limit , ltc and lt are registered trademarks of linear technology corporation. *us patent number 5,723,970**see lt1510 for 1.5a charger; see lt1511 for 3a charger features descriptio u applicatio s u typical applicatio u swboost comp1 cln uv ovp sense bat c11 f r s4 ? adapter current sense r7 ? 500 r5 ? undervoltagelockout r65k v in (adapter input) 11v to 28v v bat c prog 1 f c in * 15 f 300 r prog 4.93k1% 0.33 f c20.47 f r s3 200 1% r s2 200 1% l1**22 h d2 1n4148 2nf 10k r s1 0.05 battery current sense r3390k 0.25% battery voltage sense r4162k 0.25% c out 22 f tant 8.4vli-ion lt1769 note: complete lithium-ion charger,no termination required. r s4 , r7 and c1 are optional for i in limiting *tokin or united chemi-con/marcon ceramic surface mount **22 h sumida cdrh125 ? see applications information for input current limit and undervoltage lockout ?? general semiconductor. for t j less then 100 c mbrs130lt3 can be used v cc to mainsystem load spin d1 ?? ss24 gnd clp d3 ?? ss24 1511 ?f01 prog v c + downloaded from: http:///
2 lt1769 1769fa absolute m axi m u m ratings w ww u package/order i n for m atio n w u u order part number *all v cc pins should be connectedtogether close to the pins ** all gnd pins are fused to internal dieattach paddle for heat sinking. connect these pins to expanded pc lands for proper heat sinking. 35 c/w thermal resistanceassumes an internal ground plane doubling as a heat spreader lt1769cgnlt1769ign t jmax = 125 c, q ja = 35 c/ w** 12 3 4 5 6 7 8 9 1011 12 13 14 top view gn package 28-lead plastic ssop 2827 26 25 24 23 22 21 20 19 18 17 16 15 gnd**gnd** gnd** sw boost uv gnd**gnd** ovp clp cln comp1 sense gnd** gnd**gnd** gnd** v cc1 * v cc2 * v cc3 * gnd**prog v c uv out comp2bat spin gnd** supply voltage (v cc , clp and cln pin voltage) ......................... 30v boost pin voltage with respect to v cc ................. 25v i bat (average) ........................................................... 2a operating junction temperature range commercial ........................................... 0 c to 125 c industrial ......................................... 40 c to 125 c consult ltc marketing for parts specified with wider operating temperature ranges. (note 1) operating ambient temperature commercial ............................................ 0 c to 70 c industrial ........................................... 40 c to 85 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number lt1769cfeLT1769IFE fe package 20-lead plastic tssop 12 3 4 5 6 7 8 9 10 top view 2019 18 17 16 15 14 13 12 11 sw boost uv gndgnd ovp cln clp comp1 sense gndv cc1 v cc2 v cc3 progv c gnduv out batspin t jmax = 125 c, q ja = 35 c/ w ? ? the bottom metal plate of this packageis fused to internal ground and is for heat sinking. solder the bottom metal plate onto pcb ground plane for heat sinking. electrical characteristics the denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 16v, v bat = 8v, r s2 = r s3 = 200 w (see block diagram), v cln = v cc . no load on any outputs unless otherwise noted. parameter conditions min typ max units overall supply current v prog = 2.7v, v cc 20v 4.5 6.8 ma v prog = 2.7v, 20v < v cc 25v 4.6 7.0 ma sense amplifier ca1 gain and input offset voltage 8v v cc 25v , 0v v bat 20v (with r s2 = 200 w , r s3 = 200 w )r prog = 4.93k 93 100 107 mv (measured across r s1 )(note 2) r prog = 49.3k 81 01 2 m v t a < 0 c7 1 3 m v v cc = 28v, v bat = 20v r prog = 4.93k 90 110 mv r prog = 49.3k 71 3 m v t a < 0 c6 1 4 m v exposed pad is ground (must be soldered to pcb) exposed pad size: 3.0 (.188) 4.1 (.162) downloaded from: http:///
3 lt1769 1769fa electrical characteristics the denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 16v, v bat = 8v, r s2 = r s3 = 200 w (see block diagram), v cln = v cc . no load on any outputs unless otherwise noted. parameter conditions min typ max units overall v cc undervoltage lockout (switch off) threshold measured at uv pin 678 v uv pin input current 0.2v v uv 8v 0.1 5 m a uv output voltage at uv out pin in undervoltage state, i uvout = 70 m a 0.1 0.5 v uv output leakage current at uv out pin 8v v uv , v uvout = 5v 0.1 3 m a reverse current from battery (when v cc is v bat 20v, v uv 0.4v 3 15 m a not connected, v sw is floating) boost pin current v cc = 20v, v boost = 0v 0.1 10 m a v cc = 28v, v boost = 0v 0.25 20 m a 2v v boost ?v cc < 8v (switch on) 6 9 ma 8v v boost ?v cc 25v (switch on) 8 12 ma switch switch on resistance 8v v cc v max , i sw = 2a, v boost ?v sw 3 2v 0.15 0.25 w d i boost / d i sw during switch on v boost = 24v, i sw 2a 25 35 ma/a switch off leakage current v sw = 0v, v cc 20v 2 100 m a 20v < v cc 28v 4 200 m a minimum i prog for switch on 242 0 m a minimum i prog for switch off 1 2.4 ma maximum v bat for switch on v cc ?2 v current sense amplifier ca1 inputs (sense, bat) input bias current 50 125 m a input common mode low 0.25 v input common mode high v cc ?2 v spin input current 100 200 m a reference reference voltage (note 3) r prog = 4.93k, measured at ovp with va supplying i prog and switch off 2.448 2.465 2.477 v reference voltage all conditions of v cc ,t a 3 0 c 2.441 2.489 v t a < 0 c (note 4) 2.43 2.489 v oscillator switching frequency 180 200 220 khz switching frequency all conditions of v cc ,t a 3 0 c 170 200 230 khz t a < 0 c 160 230 khz maximum duty cycle 90 93 % 85 % current amplifier ca2 transconductance v c = 1v, i vc = 1 m a 150 250 550 m mho maximum v c for switch off 0.6 v i vc current (out of pin) v c 3 0.6v 100 m a v c < 0.45v 3 ma downloaded from: http:///
4 lt1769 1769fa electrical characteristics typical perfor m a n ce characteristics u w efficiency of figure 1 circuit i bat (a) 0.2 efficiency (%) 100 9896 94 92 90 88 86 84 82 80 1.0 1.8 2.2 1769 g01 0.6 1.4 v in = 16.5 v bat = 8.4v charger efficiency includes loss in diode d3 v cc (v) 0 i cc (ma) 7.06.5 6.0 5.5 5.0 4.5 5 10 15 20 1769 g03 25 30 t j = 125 c t j = 25 c t j = 0 c maximum duty cycle i cc vs duty cycle duty cycle (%) 01 03 05 07 0 i cc (ma) 80 1769 g02 20 40 60 87 6 5 4 3 2 1 0 t j = 125 c t j = 0 c t j = 25 c v cc = 16v i cc vs v cc the denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 16v, v bat = 8v. no load on any outputs unless otherwise noted. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: tested with test circuit 1. note 3: tested with test circuit 2. note 4: a linear interpolation can be used for reference voltage specification between 0 c and 40 c. parameter conditions min typ max units voltage amplifier va transconductance (note 3) output current from 50 m a to 500 m a 0.25 0.6 1.3 mho output source current v ovp = v ref + 10mv, v prog = v ref + 10mv 1.1 ma ovp input bias current va output current at 0.5ma 3 10 na va output current at 0.5ma, t a > 90 c ?5 25 na va output current at 0.5ma, t a < 0 c 15 na current limit amplifier cl1, 8v input common mode turn-on threshold 0.5ma output current 93 100 110 mv transconductance output current from 50 m a to 500 m a 0.5 1 2 mho clp input current 0.5ma output current, v uv 3 0.4v 0.3 1 m a cln input current 0.5ma output current v uv 3 0.4v 0.8 2 ma downloaded from: http:///
5 lt1769 1769fa typical perfor m a n ce characteristics u w v cc (v) 0 ? v ref (v) 0.0030.002 0.001 0 0.001 0.002 0.003 5 10 15 20 1769 g04 25 30 all temperatures v ref line regulation i va vs d v ovp (voltage amplifier) i va (ma) 0 ? v ovp (mv) 43 2 1 0 0.8 1769 g05 0.2 0.1 0.3 0.5 0.7 0.9 0.4 0.6 1.0 t j = 125 c t j = 25 c v c pin characteristics v c (v) 0 0.2 0.6 1.0 1.4 1.8 i vc (ma) 1.20 1.08 0.96 0.84 0.72 0.60 0.48 0.36 0.24 0.12 0 0.12 1.6 1769 g07 0.4 0.8 1.2 2.0 junction temperature ( c) 0 duty cycle (%) 120 1769 g06 40 80 9897 96 95 94 93 92 91 90 20 60 100 140 maximum duty cycle reference voltagevs temperature junction temperature 0 reference voltage (v) 2.4702.468 2.466 2.464 2.462 2.460 2.458 25 50 75 100 1769 g09 125 150 v prog (v) 0123 5 4 i prog (ma) 60 ? 1769 g08 t j = 125 c t j = 25 c prog pin characteristics downloaded from: http:///
6 lt1769 1769fa gnd (pins 1 to 3, 7, 8, 14, 15, 22, 26 to 28/pins 4, 5, 14,20): ground pins. must be connected to expanded pc lands for proper heat sinking. see applications informa-tion section for details. sw (pin 4/pin 1): switch output. the schottky catch diode must be placed with very short lead length in closeproximity to sw pin and gnd. boost (pin 5/pin 2): this pin is used to bootstrap and drive the switch power npn transistor to a low on-voltagefor low power dissipation. in figure 1, v boost = v cc + v bat when switch is on. for lowest ic power dissipation,connect boost diode d1 to a 3v to 6v at 30ma voltage source (see figure 10). uv (pin 6/pin 3): undervoltage lockout input. the rising threshold is at 6.7v with a hysteresis of 0.5v. switchingstops in undervoltage lockout. when the input supply (normally the wall adapter output) to the ic is removed, the uv pin must be pulled down to below 0.7v (a 5k resistor from adapter output to gnd is required) otherwise the reverse battery current drained by the ic will be approxi- mately 200 m a instead of 3 m a. do not leave the uv pin floating. when connected to v in with no resistor divider, the built-in 6.7v undervoltage lockout will be effective.ovp (pin 9/pin 6): this is the input to amplifier va with a threshold of 2.465v. typical bias current is about 3na outof this pin. for charging lithium-ion batteries, va monitors the battery voltage and reduces charging when battery voltage reaches the preset value. if it is not used, the ovp pin should be grounded. clp (pin 10/pin 8): this is the positive input to the input current limit amplifier cl1. the threshold is set at 100mv.when used to limit supply current, a filter is needed to filter out the 200khz switching noise. cln (pin 11/pin 7): this is the negative input to the input current limit amplifier cl1.comp1 (pin 12/pin 9): this is the compensation node for the input current limit amplifier cl1. at input adaptercurrent limit, this node rises to 1v. by forcing comp1 low with an external transistor, amplifier cl1 will be defeated (no adapter current limit). comp1 can source 200 m a. if this function is not used, the resistor and capacitor oncomp1 pin, shown on the figure 1 circuit, are not needed. sense (pin 13/pin 10): current amplifier ca1 input. sensing can be at either terminal of the battery.spin (pin 16/pin 11): this pin is for the current amplifier ca1 bias. it must be connected to r s1 as shown in the 2a lithium battery charger (figure 1).bat (pin 17/pin 12): current amplifier ca1 input. comp2 (pin 18): this is also a compensation node for amplifier cl1. voltage on this pin rises to 2.8v at inputadapter current limit and/or at constant-voltage charging. uv out (pin 19/pin 13): this is an open-collector output for undervoltage lockout status. it stays low in undervoltagestate. with an external pull-up resistor, it goes high at valid v cc . note that the base drive of the open-collector npn comes from cln pin. uv out stays low only when cln is higher than 2v. pull-up current should be kept under 100 m a. v c (pin 20/pin 15): this is the inner loop control signal for the current mode pwm. switching starts at 0.7v. innormal operation, a higher v c corresponds to higher charge current. a capacitor of at least 0.33 m f to gnd filters out noise and controls the rate of soft start. to stop switching, pull this pin low. typical output current is 30 m a. prog (pin 21/pin 16): this pin is for programming the charge current and for system loop compensation. duringnormal operation, v prog stays close to 2.465v. if it is shorted to gnd switching will stop. when a microproces-sor controlled dac is used to program charge current, it must be capable of sinking current at a compliance up to 2.465v. v cc1 , v cc2 , v cc3 (pins 23 to 25/pins 17 to 19): input supply. for good bypass, a low esr capacitor of 15 m f or higher is required, with the lead length kept to a minimum.v cc should be between 8v and 28v and at least 3v higher than v bat . undervoltage lockout starts and switching stops when v cc goes below 7v typical. note that there is an internal parasitic diode from sw pin to v cc pin. do not force v cc below sw by more than 0.7v with battery present. all three v cc pins should be shorted together close to the pins. pi n fu n ctio n s uuu (gn/fe pin numbers) downloaded from: http:///
7 lt1769 1769fa block diagra m w + + + + + v sw 0.7v 1.5v v bat v ref v c gnd uv slope compensation r2 r3 c1 pwm b1 ca2 + + ca1 va + + + 7v + v ref 2.465v shutdown 200khz oscillator s rr r r11k r prog v cc uv out v cc boostsw sense spinbat i prog r s3 r s2 r s1 i bat 0vp bat 1769 bd prog i prog i bat = (i prog )(r s2 ) r s1 c prog 75k q sw v cc g m = 0.64 w + cl1 clp 100mv cln comp1 comp2 + = (r s3 = r s2 ) 2.465v r prog r s2 r s1 (( )) downloaded from: http:///
8 lt1769 1769fa test circuits test circuit 1 + v ref ? 0.65v v bat v c ca2 + + ca1 + 300 20k 1k 1k r s1 100 bat sense spin 1769 tc01 prog r prog 0.047 m f lt1769 1 m f 60k lt1006 + r s2 200 r s3 200 test circuit 2 v ref 2.465v + + 10k 10k ovp 1769 tc02 i prog r prog lt1769 prog lt1013 0.47 m f + va operatio n u the lt1769 is a current mode pwm step-down (buck)switcher. the battery dc charge current is programmed by a resistor r prog (or a dac output current) at the prog pin (see block diagram). amplifier ca1 converts thecharge current through r s1 to a much lower current i prog fed into the prog pin. amplifier ca2 compares the outputof ca1 with the programmed current and drives the pwm control loop to force them to be equal. high dc accuracy is achieved with averaging capacitor c prog . note that i prog has both ac and dc components. i prog goes through r1 and generates a ramp signal that is fed to thepwm control comparator c1 through buffer b1 and level shift resistors r2 and r3, forming the current mode innerloop. the boost pin drives the switch npn q sw into saturation and reduces power loss. for batteries likelithium-ion that require both constant-current and con- stant-voltage charging, the 0.5%, 2.465v reference and the amplifier va reduce the charge current when battery voltage reaches the preset level. for nimh and nicd, va can be used for overvoltage protection. when the input voltage is removed, the v cc pin drops to 0.7v below the battery voltage, forcing the charger into a low battery drain(3 m a typical) sleep mode. to shut down the charger, simply pull the v c pin low with a transistor. downloaded from: http:///
9 lt1769 1769fa applicatio n s i n for m atio n wu u u input and output capacitorsin the 2a lithium-ion battery charger (figure 1), the input capacitor (c in ) is assumed to absorb all input switching ripple current in the converter, so it must have adequateripple current rating. worst-case rms ripple current will be equal to one half of the output charge current. actual capacitance value is not critical. solid tantalum capacitors such as the avx tps and sprague 593d series have high ripple current rating in a relatively small surface mount package, but caution must be used when tantalum capaci- tors are used for input bypass . high input surge currents are possible when the adapter is hot-plugged to thecharger and solid tantalum capacitors have a known failure mechanism when subjected to very high turn-on surge currents. selecting a high voltage rating on the capacitor will minimize problems. consult with the manu- facturer before use. alternatives include new high capacity ceramic (5 m f to 20 m f) from tokin or united chemi-con/ marcon, et al. sanyo os-con can also be used.the output capacitor (c out ) is also assumed to absorb output switching ripple current. the general formula forcapacitor ripple current is: i rms = (l1)(f) v bat v cc () 0.29 (v bat ) 1 for example, v cc = 16v, v bat = 8.4v, l1 = 20 m h, and f = 200khz, i rms = 0.3a. emi considerations usually make it desirable to minimizeripple current in the battery leads. beads or inductors can be added to increase battery impedance at the 200khz switching frequency. switching ripple current splits be- tween the battery and the output capacitor depending on the esr of the output capacitor and the battery imped- ance. if the esr of c out is 0.2 w and the battery impedance is raised to 4 w with a bead or inductor, only 5% of the ripple current will flow into the battery.soft-start and undervoltage lockout the lt1769 is soft-started by the 0.33 m f capacitor on the v c pin. on start-up, the v c pin voltage will quickly rise to 0.5v, then ramp at a rate set by the internal 45 m a pull-up current and the external capacitor. charge current starts ramping up when v c pin voltage reaches 0.7v and full current is achieved with v c at 1.1v. with a 0.33 m f capaci- tor, the time to reach full charge current is about 10ms andit is assumed that input voltage to the charger will reach full value in less than 10ms. the capacitor can be increased up to 1 m f if longer input start-up times are needed. in any switching regulator, conventional time-based soft-starting can be defeated if the input voltage rises much slower than the time out period. this happens because the switching regulators in the battery charger and the com- puter power supply are typically supplying a fixed amount of power to the load. if the input voltage comes up slowly compared to the soft-start time, the regulators will try to deliver full power to the load when the input voltage is still well below its final value. if the adapter is current limited, it cannot deliver full power at reduced output voltages and the possibility exists for a quasi ?atch?state where the adapter output stays in a current limited state at reduced output voltage. for instance, if maximum charger plus computer load power is 25w, a 15v adapter might be current limited at 2a. if adapter voltage is less than (25w/2a = 12.5v) when full power is drawn, the adapter voltage will be pulled down by the constant 25w load until it reaches a lower stable state where the switching regu- lators can no longer supply full load. this situation can be prevented by utilizing undervoltage lockout , set higher than the minimum adapter voltage where full power can beachieved. a fixed undervoltage lockout of 7v is built into the lt1769. this 7v threshold can be increased by adding a resistive divider to the uv pin as shown in figure 2. internal lockout is performed by clamping the v c pin low. the v c pin is released from its clamped state when the uv pin risesabove 7v and is pulled low when the uv pin drops below 6.5v (0.5v hysteresis). at the same time uv out goes high with an external pull-up resistor. this signal can be usedto alert the system that charging is about to start. the charger will start delivering current about 4ms after v c is released, as set by the 0.33 m f capacitor. a resistor divider is used to set the desired v cc lockout voltage as shown in figure 2. a typical value for r6 is 5k and r5 is found from: r5 = r6(v C v ) v uv uv in downloaded from: http:///
10 lt1769 1769fa applicatio n s i n for m atio n wu u u v uv = rising lockout threshold on the uv pin v in = charger input voltage that will sustain full load power example: with r6 = 5k, v uv = 6.7v and setting v in at 12v; r5 = 5k (12v ?6.7v)/6.7v = 4kthe resistor divider should be connected directly to the adapter output as shown, not to the v cc pin, to prevent battery drain with no adapter voltage. if the uv pin is notused, connect it to the adapter output (not v cc ) and connect a resistor no greater than 5k to ground. floatingthis pin will cause reverse battery current to increase from 3 m a to 200 m a. if connecting the unused uv pin to the adapter output is notpossible, it can be grounded. although it would seem that grounding the pin creates a permanent lockout state, the uv circuitry is arranged for phase reversal with low volt- ages on the uv pin to allow the grounding technique to work. adapter load current remains below the limit. amplifiercl1 in figure 2 senses the voltage across r s4 , connected between the clp and cln pins. when this voltage exceeds100mv, the amplifier will override the programmed charge current to limit adapter current to 100mv/r s4 . a lowpass filter formed by 500 w and 1 m f is required to eliminate switching noise. if the input current limit is not used, bothclp and cln pins should be connected to v cc . charge current programmingthe basic formula for charge current is (see block diagram): i bat = i prog = 2.465v r prog r s2 r s1 () ( ) r s2 r s1 () where r prog is the total resistance from prog pin to ground. for the sense amplifier ca1 biasing purpose, r s3 should have the same value as r s2 and spin should be connected directly to the sense resistor (r s1 ) as shown in the block diagram.for example, 2a charge current is needed. for low power dissipation on r s1 and enough signal to drive the amplifier ca1, let r s1 = 100mv/2a = 0.05 w . this limits r s1 power to 0.2w. let r prog = 5k, then: r s2 = r s3 = = = 200 (i bat )(r prog )(r s1 ) 2.465v (2a)(5k)(0.05) 2.465v charge current can also be programmed by pulse widthmodulating i prog with a switch q1 to r prog at a frequency higher than a few khz (figure 3). charge current will beproportional to the duty cycle of the switch with full current at 100% duty cycle. lithium-ion charging the 2a lithium-ion battery charger (figure 1) charges at a constant 2a until battery voltage reaches a limit set by r3 and r4. the charger will then automatically go into a constant-voltage mode with current decreasing to near zero over time as the battery reaches full charge. this is the normal regimen for lithium-ion charging, with the charger 100mv 500 clpcln v cc uv 1769 f02 r5 lt1769 r6 1 m f + r s4 * v in ac adapter output *r s4 = 100mv adapter current limit + + cl1 figure 2. adapter input current limiting adapter current limitingan important feature of the lt1769 is the ability to automatically adjust charge current to a level which avoids overloading the wall adapter. this allows the product to operate at the same time the batteries are being charged without complex load management algo rithms. addition- ally, batteries will automatically be charged at the maximumpossible rate of which the adapter is capable. this is accomplished by sensing total adapter output current and adjusting the charge current downward if a preset adapter current limit is exceeded. true analog control is used, with closed-loop feedback ensuring that downloaded from: http:///
11 lt1769 1769fa applicatio n s i n for m atio n wu u u holding the battery at ?loat?voltage indefinitely. in thiscase no external sensing of full charge is needed. battery voltage sense resistors selection to minimize battery drain when the charger is off, current through the r3/r4 divider is set at 15 m a. the input current to the ovp pin is 3na and the error can be neglected.with divider current set at 15 m a, v bat = 8.4v, r4 = 2.465/15 m a = 162k and, r3 r4 v 2.465 2.465 162k 8.4 2.465 2.465 390k bat = () - () = - () = li-ion batteries typically require float voltage accuracy of1%. accuracy of the lt1769 ovp voltage is 0.5% at 25 c and 1% over full temperature. this leads to the possibility that very accurate (0.1%) resistors might beneeded for r3 and r4. actually, the temperature of the lt1769 will rarely exceed 50 c in float mode because charging currents have tapered off to a low level, so0.25% resistors will normally provide the required level of overall accuracy. when power is on, there is about 200 m a of current flowing out of the bat and sense pins. if the battery is removedduring charging, and total load including r3 and r4 is less than 200 m a, v bat could float up to v cc even though the loop has turned switching off. to keep v bat regulated to the battery voltage in this condition, r3 and r4 can bechosen to draw 0.5ma and q3 can be added to disconnect them when power is off (figure 4). r5 isolates the ovp pin from any high frequency noise on v in . an alternative method figure 4. disconnecting voltage divider pwm r prog 4.7k 300 prog c prog 1 f q1vn2222 5v0v lt1769 1769 f03 i bat = (dc)(2a) figure 3. pwm current programming r312k 0.25% r44.99k 0.25% ovp v in + 8.4v v bat q3 vn2222 lt1769 1769 f04 r5 220k is to use a zener diode with a breakdown voltage two or threevolts higher than battery voltage to clamp the v bat voltage. battery manufacturers recommend terminating the con-stant-voltage float mode after charge current has dropped below a specified level (typically around 10% of the full current) and a further time out period of 30 to 90 minutes has elapsed. this may extend battery life, so check with themanufacturer for details. the circuit in figure 5 will detect when charge current has dropped below 270ma. this logic signal is used to initiate a timeout period, after which the lt1769 can be shut down by pulling the v c pin low with an open collector or drain. some external means must beused to detect the need for additional charging or the figure 5. current comparator for initiating float time out negative edgeto timer 1769 f04 3.3v or 5v adapter output 3 8 7 1 4 2 d11n4148 c1 0.1 m f bat sense r1*1.6k r s1 0.05 r4470k r3430k r2560k lt1011 d2 1n4148 * trip current = = ? 270ma r1(v bat ) (r2 + r3)(r s1 ) (1.6k)(8.4v) (560k + 430k)(0.05 ) + v bat bat r s3 200 r s2 200 lt1769 i bat downloaded from: http:///
12 lt1769 1769fa applicatio n s i n for m atio n wu u u is not nearly as pronounced. this makes it more difficult to use dv/dt as an indicator of full charge, and an increase in battery temperature is more often used with a temperature sensor in the battery pack. secondly, con- stant trickle charge may not be recommended. instead, a moderate level of current is used on a pulse basis ( ? 1% to 5% duty cycle) with the time-averaged value substitut-ing for a constant low trickle. please contact the linear technology applications department about charge termi- nation circuits. if overvoltage protection is needed, r3 and r4 can be cal- culated according to the procedure described in lithium- ion charging section. the ovp pin should be grounded if not used. when a microprocessor dac output is used to controlcharge current, it must be capable of sinking current at a compliance up to 2.5v if connected directly to the prog pin. thermal calculationsif the lt1769 is used for charging currents above 1a, a thermal calculation should be done to ensure that junction temperature will not exceed 125 c. power dissipation in the ic is caused by bias and driver current, switch resis-tance and switch transition losses. the gn package, with a thermal resistance of 35 c/w, can provide a full 2a charging current in many situations. a graph is shown inthe typical performance characteristics section. p 3.5ma v 1.5ma v v v 7.5ma 0.012 i p iv 55 v p irv v tvi f bias in bat bat 2 in bat driver bat bat 2 in sw bat 2 sw bat in ol in bat = () ( ) + () + () + () () [] = () ( ) + ? ? ?? () = () ( ) ( ) + () () ( ) () 1 30 v bat r sw = switch on resistance ? 0.16 w t ol = effective switch overlap time ? 10ns f = 200khz charger may be turned on periodically to complete a shortfloat-voltage cycle. current trip level is determined by the battery voltage, r1 through r3 and the sense resistor (r s1 ). d2 generates hysteresis in the trip level to avoid multiple comparatortransitions. nickel-cadmium and nickel-metal-hydride charging the 2a lithium-ion battery charger shown in figure 1 can be modified to charge nicd or nimh batteries. for ex- ample, if a 2-level charge is needed; 1a when q1 is on and 100ma when q1 is off. figure 6. 2-level charging r25.49k r149.3k 300 prog 1 f q1 lt1769 1769 f05 for 1a full current, the current sense resistor (r s1 ) should be increased to 0.1 w so that enough signal (10mv) will be across r s1 at 0.1a trickle charge to keep charging current accurate.for a 2-level charger, r1 and r2 are found from: r1 2.465 2000 i r2 2.465 2000 ii low hi low = () () = () () - all battery chargers with fast charge rates require somemeans to detect full charge in the battery and terminate the high charge current. nicd batteries are typically charged at high current until a temperature rise or battery voltage decrease is detected as an indication of near full charge. the charging current is then reduced to a much lower value and maintained as a constant trickle charge. an intermediate ?op off?current may also be used for a fixed time period to reduce total charge time. nimh batteries are similar in chemistry to nicd but have two differences related to charging. first, the inflection characteristic in battery voltage as full charge is approached downloaded from: http:///
13 lt1769 1769fa applicatio n s i n for m atio n wu u u figure 7. lower v boost sw boost spin 1769 f07 lt1769 v x i vx c2 d2 10 f l1 + thermal resistance of the package-board combination isdominated by the characteristics of the board in the immediate area of the package. this means both lateral thermal resistance across the board and vertical thermal resistance through the board to other copper layers. each layer acts as a thermal heat spreader that increases the heat sinking effectiveness of extended areas of the board. total board area becomes an important factor when thearea of the board drops below about 20 square inches. the graph in figure 8 shows thermal resistance vs board area for 2-layer and 4-layer boards with continuous copper planes. note that 4-layer boards have significantly lower thermal resistance, but both types show a rapid increase for reduced board areas. figure 9 shows actual measured lead temperatures for chargers operating at full current. battery voltage and input voltage will affect device power dissipation, so the data sheet power calculations must be used to extrapolate these readings to other situations. vias should be used to connect board layers together. planes under the charger area can be cut away from the rest of the board and connected with vias to form both a low thermal resistance system and to act as a ground plane for reduced emi. glue-on, chip-mounted heat sinks are effective only in moderate power applications where the pc board copper cannot be used, or where the board size is small. they offer very little improvement in a properly laid out multilayer board of reasonable size. higher duty cycle for the lt1769 battery charger maximum duty cycle for the lt1769 is typically 90%, but this may be too low for some applications. for example, if example: v in = 19v, v bat = 12.6v, i bat = 2a: p 3.5ma 19 1.5ma 12.6 12.6 19 7.5ma 0.012 2000ma 0.35w p 2 12.6 55 19 0.43w p 2 0.16 12.6 19 10 19 2 200khz 0.42 0.08 0.5w bias 2 driver 2 sw 2 9 = () ( ) + () + () + () ( ) [] = = ()( ) + ? ? ?? () = = ()( )( ) + () () ( ) =+= - 1 12 6 30 . total power in the ic is: 0.35 + 0.43 + 0.5 = 1.3wtemperature rise will be (1.3w)(35 c/w) = 46 c. this assumes that the lt1769 is properly heat sunk by con-necting the eleven fused ground pins to expanded traces and that the pc board has a backside or internal plane for heat spreading. the p driver term can be reduced by connecting the boost diode d2 (see figure 7) to a lower system voltage (lowerthan v bat ) instead of v bat . then p driver = () ( ) () + ? ? ?? () ivv v v bat bat x x in 1 30 55 for example, v x = 3.3v then: p avv v v w driver = () ( ) ( ) + ? ? ?? () = 2 126 33 1 33 30 55 19 009 .. . . the average i vx required is: p v w v ma driver x == 009 33 28 . . the previous example shows the dramatic drop in driverpower dissipation when the boost diode (d2) is connected to an external 3.3v source instead of the 12.6v battery. p driver drops from 0.43w to 0.09w resulting in an approximately 12 c drop in junction temperature. fused-lead packages conduct most of their heat out theleads. this makes it very important to provide as much pc board copper around the leads as is practical. total downloaded from: http:///
14 lt1769 1769fa applicatio n s i n for m atio n wu u u figure 11. replacing the input diode charge current (a) 0 lead temperature on pins 1, 2, 3 ( c) 40 50 2 1769 f09 3020 0.5 1 1.5 7060 note: peak die temperature will be about 15 c higher at 2a charge current v in = 19v v bat = 12.3v v boost = 5v 2-layer boardroom temp = 24 c 5 in 2 board 25 in 2 board board area (in 2 ) 0 4540 35 30 25 20 15 10 15 25 1769 f08 510 20 30 35 thermal resistance ( c/w) measured from air ambientto die using copper lands as shown on data sheet 2-layer board 4-layer board figure 8. lt1769 thermal resistance figure 10. high duty cycle v in swboost spin sense bat v cc v x 3v to 6v c x 10 m f v bat 1769 f11 c2 0.47 f d2 d1 r x 50k q2 q1 lt1769 high duty cycle connection q1 = si4435dyq2 = tp0610l + + swboost spin sense bat v bat c3 0.47 f d2 lt1769 swboost spin sense bat v x 3v to 6v c x 10 m f v bat 1769 f10 c3 0.47 f d2 lt1769 standard connection high duty cycle connection + + an 18v 3% adapter is used to charge ten nimh cells, the charger must put out approximaly 15v. a total of 1.6v islost in the input diode, switch resistance, inductor resis- tance and parasitics, so the required duty cycle is 15/16.4 = 91.4%. the duty cycle can be extended to 93% by restricting boost voltage to 5v instead of using v bat as is normally done. this lower boost voltage also reducespower dissipation in the lt1769, so it is a win-win decision. connect an external source of 3v to 6v at v x node in figure 10 with a 10 m f c x bypass capacitor. lower dropout voltagefor even lower dropout and/or reducing heat on the board, the input diode d3 can be replaced with a fet (see figure 11). connect a p-channel fet in place of the input diode with its gate connected to the battery causing the fet toturn off when the input voltage goes low. the problem is that the gate must be pumped low so that the fet is fully turned on even when the input is only a volt or two above the battery voltage. also there is a turn-off speed issue. the fet should turn off instantly when the input is dead shorted to avoid large current surges from the battery back through the charger into the fet. gate capacitance slows turn-off, so a small p-channel (q2) is added to discharge the gate capacitance quickly in the event of an input short. the q2 body diode creates the necessary pumping action to keep the gate of q1 low during normal operation. note that q1 and q2 have a v gs spec limit of 20v. this restricts v in to a maximum of 20v. for low dropout operation with v in > 20v consult factory. figure 9. lt1769 lead temperature downloaded from: http:///
15 lt1769 1769fa applicatio n s i n for m atio n wu u u optional diode connectionsthe typical application in figure 1 shows a single diode (d3) to isolate the v cc pin from the adaptor input and to block reverse input voltage (both steady state and tran-sient). this simple connection may be unacceptable in situations where the system load must be powered from the battery when the adapter input power is removed. as shown in figure 12, a parasitic diode exists from the sw pin to the v cc pin in the lt1769. when the input power is removed, this diode will become forward biased and willprovide a current path from the battery to the system load. because of diode power limitations, it is not recommended to power the system load through the internal parasitic diode. to safely power the system load from the battery, an additional schottky diode (d4) is needed. for minimum losses, d4 could be replaced by a low r ds(on) mosfet which is turned on when the adapter power is removed. layout considerationsswitch rise and fall times are under 10ns for maximum efficiency. to minimize radiation, the catch diode, sw pin and input bypass capacitor leads should be kept as short as possible. a ground plane should be used under the switching circuitry to prevent interplane coupling and to act as a thermal spreading path. all ground pins should be connected to expanded traces for low thermal resistance. the fast-switching high current ground path, including the switch, catch diode and input capacitor, should be kept very short. catch diode and input capacitor should be close to the chip and terminated to the same point. this path contains nanosecond rise and fall times with several amps of current. the other paths contain only dc and/or 200khz tri-wave and are less critical. figure 13 indicates the high speed, high current switching path. figure 14 shows critical path layout. contact linear technology for the lt1769 circuit pcb layout or gerber file. sw l1 clp cln adapterin to system load r s1 c in r s4 r7 500 w c11 f d3 lt1769 internal parasitic diode v cc 1769 f12a d4 + + + figure 12. modified diode connection figure 13. high speed switching path 1769 f13 v bat l1 v in high frequency circulating path bat switch node c in c out d1 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. c in c out r s1 d1 l1 gnd gnd 1769 f14 to gnd to gnd note: connect all gnd pins to expanded pc lands for proper heat sinking gndgnd gnd sw boost uv gnd gnd ovp clp cln comp1 sense gnd gndgnd gnd v cc1 v cc2 v cc3 gnd prog v c uv out comp2 bat spin gnd figure 14. critical electrical and thermal path layout downloaded from: http:///
16 lt1769 1769fa lt/tp 1101 1.5k rev a ? printed in usa ? linear technology corporation 1999 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com part number description comments lt1372/lt1377 500khz/1mhz step-up switching regulators high frequency, small inductor, high efficiency switchers, 1.5a switch lt1376 500khz step-down switching regulator high frequency, small inductor, high efficiency switcher, 1.5a switch lt1505 high current, high efficiency battery charger 94% efficiency, synchronous current mode pwm lt1510 constant-voltage/constant-current battery charger up to 1.5a charge current for lithium-ion, nicd and nimh batteries lt1511 constant-voltage/constant-current battery charger up to 3a charge current for lithium-ion, nicd and nimh batteries lt1512/lt1513 sepic battery chargers v in can be higher or lower than battery voltage ltc1729 li-ion battery charger termination controller preconditioning if cell < 2.7v, 3hr time-out, c/10 detection, temp sensor pin, charger and battery detection ltc1759 smbus smart battery charger 94% efficiency with input current limiting, up to 8a i chg ltc1960 dual battery charger and selector with spi interface i charge up to 6a, fast charge, longer battery life, crisis management related parts package descriptio n u gn package 28-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) gn28 (ssop) 1098 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.0075 ?0.0098 (0.191 ?0.249) 0.053 ?0.069 (1.351 ?1.748) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.009 (0.102 ?0.249) 0.0250 (0.635) bsc 0.386 ?0.393* (9.804 ?9.982) 12 3 4 5 6 7 8 9 10 11 12 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 202122232425262728 19 18 17 13 14 16 15 0.033 (0.838) ref fe package 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation cb fe20 (cb) tssop 0203 0.09 ?0.20 (.0036 ?.0079) 0 ?8 recommended solder pad layout 0.45 ?0.75 (.018 ?.030) 4.30 ?4.50* (.169 ?.177) 1.20 (.047) max 0.05 ?0.15 (.002 ?.006) 0.65 (.0256) bsc 0.195 ?0.30 (.0077 ?.0118) 2.74 (.108) 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 3.86 (.152) 6.40 bsc 134 5 6 7 8910 1112 14 13 6.40 ?6.60* (.252 ?.260) 3.86 (.152) 2.74 (.108) 20 1918 17 16 15 2 millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment downloaded from: http:///

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